Structures of this type serve to protect the semiconductor components against damage or destruction by uncontrolled electrostatic discharges (ESD) by virtue of the parasitic charges that have accumulated as a result of electrostatic charging being conducted away to one of the supply lines in a targeted manner via the protection structures and thus in low-resistance fashion. This prevents the discharge current, which can be a few amperes, from leading to the avalanche breakdown of the component and thus to the destruction thereof. The ESD protection structures are dimensioned for this purpose in such a way that they impart the required current-carrying capacity to the semiconductor component without themselves being destroyed.
The semiconductor structures, which are becoming smaller and smaller as the integrated density increases, increase the sensitivity of the components to electrostatic charging. In particular the decrease in the thickness of the gate oxide in MOS components that accompanies the miniaturization leads to an increase in the susceptibility of the signal inputs and signal outputs of the semiconductor components, since a breakdown in the gate oxide region, for example, is connected with an injection of electrons into the gate oxide and an acceleration of charge carriers in the channel, which inevitably brings about damage to the component in the case of said discharge currents.
A known embodiment of such ESD protection structures that bring about the protection of the component by targeted bypassing of the charge is the realization of a diode in the semiconductor structure. In this case, this realization of a diode is coordinated such that the breakdown voltage of the diode lies below those of the structural parts to be protected of the semiconductor component. The diode is formed by corresponding doped p- and n-conducting regions in the region of the substrate, which is near the surface. The breakdown takes place via the areas of the regions that adjoin one another vertically or laterally. In this case, the internal resistance of the ESD protection structure is a significant factor. Such diodes generally have a considerable parasitic series resistance, which considerably limits the amount of current that can be shunted. It is possible to reduce the internal resistance of said diodes by enlarging the areas of the active pn junctions, for example in large-area diodes, but this not only increases the capacitance of the input circuit and reduces the chip density of the components, but also increases the costs of the entire semiconductor component.
Furthermore, in the realization of ESD protection structures by implantations in the region near the surface, the currents that flow away in the case of an ESD event near the silicon surface lead to a local temperature increase, reducing the current-carrying capacity even further, and likewise lead to damage of the component, in the case of a locally very large temperature increase.